“Two halves make an entire” is a really outdated and sometimes true maxim. For instance, it’s virtually all the time true when stated about AC section angle energy management. You not often need vital alternating half-cycle asymmetry as a result of (often undesirable) DC load present part that unequal half-cycle conduction angles create. A properly balanced, DC-free, complete, and symmetrical full-wave energy is due to this fact the specified output waveform.
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So, what to do if in case you have an software that wants higher symmetry than obtainable thyristors can ship with out some fine-tuning? For instance, in Determine 1, Q2’s datasheet specifies ±3 V = ±8% of polarity-dependent set off voltage asymmetry. Or suppose that (for some weird cause) you truly need exactly controllable quantities of deliberate half-cycle conduction angle inequality. What then?
Determine 1 gives a easy answer for each issues. It implements unbiased management of constructive and adverse half-cycle section angles utilizing separate and unbiased trigger-time constant-setting PWM channels: One for constructive half cycles, one other for adverse. The place:
Constructive half-wave time-constant = R1C1 / DF+
Detrimental half-wave time-constant = R1C1 / DF-
DF = PWM obligation issue = 0 to 1
Determine 1 Q1 and Q3 present unbiased triggering-time constants for reverse polarity half-waves.
The facility management methodology in play is section angle conduction through QUADRAC thyristor Q2. It’s wired within the conventional method besides that opto-isolators Q1 and Q3 fill in for the standard handbook section adjustment pot. The obligation issue (DF) of the PWM inputs units the phototransistor’s common conductance. Diodes D1 and D2 choose whichever optoisolator corresponds with an instantaneous 60-Hz half-wave polarity. The sort H11D1 300-V opto has a typical present switch ratio of 80% which makes ~10 mA of PWM drive present vital. Present limiter R2’s 330 Ω assumes a 5-V rail and a low impedance driver. That can want adjustment if both assumption doesn’t apply to your system. The PWM cycle fee isn’t important however needs to be circa 10 kHz.
The complete-throttle output effectivity is round 99%, however Q2’s most junction temperature ranking is simply 110 °C. So, enough heatsinking of Q2 shall be smart if RMS output >200 W is anticipated.
The adjustment vary for every half-cycle section spans an higher restrict of DF = 1, which units a most conductance angle of ~2.6 radians and 95% = 117 Vrms output energy, all the way down to DF = 0 and 0 energy. Determine 2 reveals the approximate relationship between DF and conduction angle, whereas Determine 3 illustrates its inverse.
Determine 2 Thyristor conduction angle R [R = pi – 0.60 DF-(2/pi)] versus PWM DF, the place the y-axis is in radians and the x-axis is the unitless DF.
Determine 3 The PWM DF [DF = ((pi – R)/0.60)-(pi/2)] versus the specified conduction angle R. The y-axis is the DF, and the x-axis is in radians.
Stephen Woodward’s relationship with EDN’s DI column goes again fairly a good distance. Over 100 submissions have been accepted since his first contribution again in 1974.
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