HomeElectronicsTake again half improves PWM integral linearity and settling time

Take again half improves PWM integral linearity and settling time



Take again half improves PWM integral linearity and settling time

PWM is a straightforward, cool, low cost, cheerful, and (due to this fact) well-liked DAC expertise. Glorious differential nonlinearity (DNL) and monotonicity are just about assured by PWM. Additionally assured are a secure zero and a full-scale accuracy that’s usually restricted solely by the standard of the voltage reference. Nonetheless, PWM’s integral nonlinearity (INL) isn’t all the time terrific, and the need for low-pass filtering-out of ripple means its pace isn’t too swift both. These messy matters are coated in…

  1. A standard reason for, and a software program treatment for, PWM INL is mentioned right here in “Minimizing passive PWM ripple filter output impedance: How low are you able to go?
  2. The sluggish PWM settling instances (Ts) that may be problematic, along with a solution to cut back them, are addressed right here in “Cancel PWM DAC ripple with analog subtraction.”

Determine 1 presents a difficult, completely analog technique for each. The ploy in play is Take Again Half (TBH). It depends on two differential relationships that successfully subtract (take again) the error phrases.

  1. For sign frequencies lower than or equal to 1/Ts (together with DC) Xc >> R and Z = 2(Xavg – Yavg/2).
  2. For frequencies better than or equal to Fpwm, Xc << R and Z = Xripple – Yripple.

Determine 1 All Rs and Cs are nominally equal. The circuit depends on two differential relationships that successfully subtract the error phrases for the TBH methodology.

Wow the engineering world together with your distinctive design: Design Concepts Submission Information

As a result of just one swap drives load R at node Y whereas two in parallel drive X, INL resulting from swap loading at Y is strictly twice that at X. Due to this fact, Z = 2(Xavg – Yavg/2) takes again, cancels the error, and has (theoretically) zero INL.

Xripple = Yripple, so Z = Xripple – Yripple = 0 nulls it out, has likewise (theoretically) zero ripple, and ripple filter RC time constants may be made quicker and settling instances shorter.

The DC conversion element at Z = -PWM_duty_factor * Vref. Conversion accuracy is exactly unity, unbiased of resistance and capacitance tolerances. Nonetheless, they ideally must be precisely equal for finest ripple and nonlinearity cancellation.

Stephen Woodward’s relationship with EDN’s DI column goes again fairly a good distance. Over 100 submissions have been accepted since his first contribution again in 1974.

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