Jane Avenue has launched a contest for FPGA builders, utilizing the puzzles set throughout this yr’s Creation of Code to advertise options primarily based on synthesizable {hardware} — and entrants can win prizes as much as and together with an AMD Zynq UltraScale+ Kria KV260 FPGA improvement equipment for his or her entries.
“Creation of Code has lengthy been a favourite December ritual at Jane Avenue, with many collaborating within the month-long puzzle problem that encourages considerate engineering and out-of-the-box considering — very a lot our form of enjoyable,” Jane Avenue’s Benjamin Devlin explains. “Final yr, Anish, a {hardware} engineer at Jane Avenue, wrote about tackling all the sequence in Hardcaml, our OCaml-based {hardware} DSL, turning these puzzles into synthesizable FPGA circuits. In the event you missed it, his publish, Creation of Hardcaml, walks you thru how implementing such algorithms in {hardware} turned a singular train in architectural design and useful resource optimization.”
Fancy an FPGA-flavored problem? Attempt jane Avenue’s Creation of FPGA and you might win an AMD Zynq dev board. (📷: AMD)
Now, the corporate is seeking to encourage others to do the identical with the 2025 Creation of FPGA problem. The thought: taking the programming puzzles set annually by Eric Wastl, who based the Creation of Code problem sequence again in 2015, and fixing them in {hardware} moderately than software program.
“When the ultimate AoC 2025 puzzle drops, decide any puzzles you want (at the very least one and as much as as many as you need) to construct synthesizable RTL with real looking I/O [Input/Output],” Devlin and Anish Singhani clarify. “Bonus factors in case you do it in Hardcaml. We’re excited to see the intelligent designs created throughout the educational and open‑supply communities, and we’d additionally like to get extra individuals attempting Hardcaml!”
Extra data on the competitors, entries for which shut on January 16, 2026, is out there on the Jane Avenue weblog.
