HomeElectronicsFPGA prototyping harnessed for RISC-V processor cores

FPGA prototyping harnessed for RISC-V processor cores



FPGA prototyping harnessed for RISC-V processor cores

FPGA-based prototyping options supplier S2C has teamed up with RISC-V processor IP provider Andes Expertise to reinforce prototyping capabilities for system-on-chip (SoC) designs. This collaboration goals to bolster capability and suppleness for modeling, prototyping, and software program growth work carried out round Andes’ RISC-V cores.

The partnership is constructed round S2C’s lately launched Prodigy S8-100 FPGA prototyping platform, which relies on AMD’s Versal Premium VP1902 adaptive SoC. “Versal Premium VP1902 adaptive SoC is the business’s largest FPGA-based adaptive SoC,” mentioned Mike Slightly, senior product line supervisor at AMD. “That empowers engineers to push the boundaries of expertise.”

Determine 1 The VP1902 adaptive SoC bolsters prototyping platform’s capability with a bigger FPGA. Supply: AMD

Capability limitations are a standard problem in FPGA prototyping, which restricts SoC builders’ capacity to combine a number of RISC-V cores together with subsystems like network-on-chip (NoC), DDR, PCIe controllers, and extra. Prodigy S8-100 prototyping addresses these challenges by providing a single FPGA model with as much as 100 million logic gates.

“The big-capacity FPGA-based prototyping permits early customizations, finally accelerating their time-to-market with Andes-based RISC-V SoCs,” mentioned Emerson Hsiao, president of Andes Expertise USA.

Determine 2 The brand new FPGA prototyping platform additional boosts capability with bigger configurations. Supply: S2C

As proven within the above determine, Prodigy S8-100 additionally contains bigger configurations with two and even 4 VP1902 adaptive SoCs, which scales capability to as much as 400 million logic gates per system. That allows full SoC validation in {hardware}, considerably lowering growth cycles, optimizing efficiency modeling, and accelerating software program growth earlier than manufacturing silicon turns into obtainable.

Subsequent, the brand new prototyping platform encompasses S2C’s in depth library of almost 100 daughter playing cards, which help purposes starting from networking, storage, and multimedia to generic IOs. This facilitates environment friendly interface modeling and simulation with out sacrificing FPGA logic assets.

S2C’s new FPGA prototyping platform shall be demonstrated stay on the Andes RISC-V Con, which shall be held on April 29, 2025, on the DoubleTree by Hilton Lodge in San Jose, California.

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The submit FPGA prototyping harnessed for RISC-V processor cores appeared first on EDN.

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