Researchers use freezing expertise to search out how micro-sized particles trigger defects within the chip-making course of and design higher strategies to forestall them.
One of many largest challenges in semiconductor fabrication is stopping microscopic defects that type in the course of the lithography course of. Even a particle a couple of nanometres vast can disrupt a circuit and render a complete chip unusable.
At superior manufacturing nodes beneath 5 nanometres, such defects can result in vital yield losses, making it important to grasp exactly how and why they happen.
Researchers in China have developed a cryogenic imaging method that enables them to watch these defects as they type. The tactic makes use of cryo-electron tomography (cryo-ET) to freeze the chemical reactions concerned in lithography and visualise them in three dimensions.
This system, tailored from organic imaging, allows direct remark of the behaviour of photoresist supplies throughout chip sample improvement.
In standard lithography, a light-sensitive liquid known as photoresist is utilized to a silicon wafer and uncovered to ultraviolet mild by means of a patterned masks. The uncovered areas dissolve throughout chemical improvement, abandoning a stencil that defines the circuit structure.
Nevertheless, throughout this course of, a few of the dissolved supplies clump collectively into nanoparticles. These particles can reattach to the wafer floor, creating electrical bridges or breaks that trigger chip failure.
Utilizing cryo-ET, the researchers froze the developer liquid at -175°C instantly after publicity, preserving its chemical state for imaging. The 3D evaluation revealed that photoresist polymers type tangled clusters by means of weak molecular interactions and that many of those polymers fail to dissolve utterly. They continue to be on the floor and redeposit in the course of the rinsing course of.
Based mostly on these findings, the crew refined the method by barely elevating the post-exposure bake temperature to scale back polymer tangling and modifying the rinse circulate to brush away floor particles. Testing on 12-inch wafers confirmed a 99% drop in lithography defects, providing a clearer path towards steady and high-yield semiconductor manufacturing.
