There’s been curiosity not too long ago right here within the land of Design Concepts (DIs) in a household of straightforward interface circuits for pulse width modulation (PWM) management of generic voltage regulators (each linear and switching). Family members depend on the regulator’s inside voltage reference and a discrete FET linked in sequence with the regulator’s programming voltage divider. 

PWM makes use of the FET as a swap to modulate the underside resistor (R1) of the divider, in order that the 0 to 100% PWM responsibility issue (DF) varies the time-averaged efficient conductance of R1 from 0 to 100% of its nominal worth.  This variation packages the regulator output from Vo = Vs (its suggestions pin reference voltage) at DF = 0 to Vo = Vs(R2/R1 + 1) at DF = 100%.

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A few of these circuits set up a linear performance between DF and Vo. Determine 1 is an instance of that style as described in “PWM buck regulator interface generalized design equations.”

Determine 1 PWM packages Vo linearly the place Vo = Vs(R2/(R1/DF) + 1).

For others, like Determine 2’s idea designed by frequent contributor Christopher Paul and defined in “Enhance PWM controller-induced ripple in voltage regulators”…it’s nonlinear…

Determine 2 PWM packages Vo nonlinearly the place Vo = Vs(R2/(R1a/DF + R1b + R1c) + 1).

Be aware that for readability, Determine 2 doesn’t embrace many thrilling particulars of Paul’s progressive design. See his article on the hyperlink for the entire story.

The nonlinearity downside

Nonetheless, to discover the implications of Determine 2’s nonlinearity a bit additional, within the instance of the circuit offered in Paul’ DI:  

R1a = 2490 Ω
R1b = 2490 Ω
R1c = 4990 Ω
Vs =  0.800 V
R2 = 53600 Ω

Which, if we assume 8-bit PWM decision, supplies the response curves proven in Determine 3.

Determine 3 The 8-bit PWM setting versus DF = X/255. The left axis (blue curve) is Vo = 0.8(53600/(2490/(X/255) + 7480) + 1). The suitable axis (pink curve) is Vo volts increment per PWM least vital bit (LSBit) increment.

Paul says of this nonlinear response: “Though the output voltage is not a linear perform of the PWM responsibility cycle, a easy software-based lookup desk renders this a mere inconvenience. (Yup, ‘we will repair it in software program!’)”After all, he’s completely proper: For any chosen Vo, a corresponding DF might be simply calculated and saved in a small (256-entry) lookup desk. 

Nonetheless, translating from the computed DF to an integer 8-bit PWM code is a unique matter. Determine 3’s increment-vs-increment pink curve supplies an necessary caveat to Paul’s in any other case correct assertion.

If the conversion from 8-bit 0 to 255 code to the 0.8 V to five.1 V, or 4.3V Vo span, had been linear, then every LSBit increment would bump Vo by a continuing 15.8 mV (= 4.3 V/256). But it surely isn’t. 

And, as Determine 3’s pink curve reveals, because of the sturdy nonlinearity of the conversion, the 8-bit decision criterion is exceeded for all PWM codes < 75 and Vo < 3.77 V = 74% of full scale. 

And it will get worse: For Vo values down close to Vs = 0.8 V, the LSBit increment soars to 67 mV (= 4.3 V/64). This, due to this fact, equates to a decision of not 8 bits, however barely 6.

The repair

Sadly, there’s little or no any software program repair can do about that. Which could make nonlinearity for some purposes maybe extra than simply an “inconvenience?” So what may repair it?

The nonlinearity mainly arises from the truth that solely a fraction (R1a) of the full R1abc resistance is modulated by PWM, because the PWM DF adjustments, that fraction adjustments, which in flip adjustments the speed of change of Vo versus DF. In reality, it adjustments this by rather a lot.

Attending to specifics, within the instance of Paul’s circuit offered in his DI, we see they make the modulated resistance R1a solely 25% of the full R1 resistance at DF = 100%, with this proportion rising to 100% as DF goes to 0%. That is clearly a giant change concentrated towards decrease DF.

A clue to a potential (no less than partial) repair is discovered again within the remark that the nonlinearity and determination loss initially arose from the truth that solely a small fraction (25% R1a) of the full R1abc resistance is modulated by PWM. So, maybe an even bigger R1a fraction of R1abc may get better a number of the misplaced decision. 

As an experiment, I modified Paul’s R1 resistor values to the next.

 R1a = 7960 Ω
R1b = 1000 Ω
R1c = 1000 Ω

This makes R1a now 80% of R1abc as an alternative of solely 25%. Determine 4 illustrates the impact on the response curves. 

Determine 4 The affect of creating R1a 80% of R1abc. The left axis (blue curve) is Vo = 0.8(53600/(7960/(X/255) + 2000) + 1). The suitable axis (pink curve) is Vo volts increment per PWM LSBit increment.

Determine 4’s blue Vo versus PWM curve is clearly nonetheless nonlinear, however considerably much less so. However maybe the extra necessary enchancment is to the pink curve: In contrast to the earlier erosion of decision on the left finish of the curve to 67 mV per PWM LSBit to only 6 bits, Determine 3 maxes out at 21 mV, or 7.7 bits.

Is that this a “repair?” Properly, clearly, 7.7 bits is best than 6 bits, however it’s nonetheless not 8 bits, so decision restoration isn’t good. Additionally, my arbitrary shuffling of  R1 ratios is sort of sure to adversely affect the spectacular ripple attenuation cited in Christopher Paul’s unique article. Mid-frequency loop achieve can also undergo from the heavier loading on C2 and R2 imposed by the diminished R1c worth. This might result in a potential deterioration of the transient response and noise rejection. Maybe C2 could possibly be elevated to reasonable that impact.

Nonetheless, it could be truthful to name it a begin at a repair for nonlinearity that lay past the attain of software program.

Stephen Woodward’s relationship with EDN’s DI column goes again fairly a good distance. Over 100 submissions have been accepted since his first contribution again in 1974.

Associated Content material

• Enhance PWM controller-induced ripple in voltage regulators
• PWM buck regulator interface generalized design equations
• A pleasant, easy, and fairly correct PWM-driven 16-bit DAC
• Brute pressure mitigation of PWM Vdd and floor “saturation” errors

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