Location: Hyderabad
Firm: Synopsys
A&MS Structure Engineer for the Analog and Combined Sign IP group creating bodily structure of Excessive Pace Analog Built-in Circuits. You’ll be working in a staff of Analog/Combined Sign Customized Structure Design Engineers who will likely be engaged on the SerDes and Analog Combined Sign IP blocks. You might be anticipated to teach junior members within the staff and likewise use revolutionary approaches when drawing structure in order that it helps the structure to be ported simply between totally different course of nodes. To achieve success within the function, you must be capable to develop and preserve schedules whereas being proficient in understanding the complexities concerned in Excessive Pace Analog Structure design. Receives little to no directions on day-to-day work, sometimes receives common directions on new assignments and tasks. Determines and develops strategy to options. Work is impartial and collaborative in nature. Gives common updates to supervisor on challenge standing. Regularly networks with senior inside and exterior personnel in personal space of experience. You must also have a powerful need to be taught and discover new applied sciences whereas demonstrating good evaluation and downside fixing abilities. Prior information and expertise in CAD instrument utilization is a should; particularly, Customized Designer/Cadence Virtuoso, Calibre, ICV, Hercules, STAR-RXCT.
Desired Expertise
- In depth familiarity with structure of analog and combined sign CMOS circuits
- Publicity to Analog/Combined Sign circuit structure (i.e RX, TX, PLL, and so on..)
- Familiarity with Customized digital structure (i.e excessive velocity logic paths)
- Conscious of structure methods to mitigate ESD, latchup
- Information of structure results (like matching, proximity results and so on)
- Information of design for reliability (i.e EM, IR and so on..)
- Information of guidelines for superior know-how nodes throughout a number of foundries (SEC, TSMC, GF, Intel)
- Information of DFM Guidelines for superior know-how nodes (16nm and under)
- Sturdy debugging, analytical and bother taking pictures abilities
- Glorious documentation and communication abilities
