Location: Bengaluru
Firm: Synopsys
We’re hiring self-motivated particular person contributors for our subsequent era DDR/HBM/UCIe PHY IP’s!
Tasks
- Palms on in structure growth of chopping edged applied sciences for subsequent era DDR/HBM/UCIe IP growth
- Good problem-solving and debugging abilities
- Work on structure floorplan, routing and bodily verifications to fulfill high quality necessities
Necessities
- Qualification: BTech/MTech
- Expertise/Expertise: 2+ years related
- Skilled in growing high quality structure assembly timelines and verifications DRC, LVS, ERC, Antenna
- Good understanding of deep submicron results, floorplan methods in CMOS, FinFET, GAA course of applied sciences 7nm and beneath
- Publicity to structure matching methods, ESD, latch-up, EMIR, DFM, LEF era
- Collaboration with groups, foster accountability and possession
- Good written, verbal communication and interpersonal abilities
