Location: Bengaluru
Firm: Qualcomm
Basic Abstract
- 1-3 years expertise in Digital ASIC / Processor Design
- Robust fundamentals in core areas: Microarchitecture, Laptop Arithmetic, Circuit Design, Course of Know-how
- Robust communication expertise to work with design groups worldwide
- Intensive expertise in Synthesis (DC or Genus), Formal Verification (LEC / Formality), Conformal Low Energy, PTPX, Primetime, Conformal ECO
- Intensive expertise in UPF based mostly energy intent and synthesis
Extra Job Description
- Excessive-speed and Low-power 5G and WLAN Modem Hardmacro Implementation Lead
- Lead, practice and mentor crew of junior engineers to execute on a posh challenge for a big modem design in superior course of nodes
- Work intently with RTL, DFT and PD leads worldwide to take a challenge from Publish-RTL to Netlist launch, and converge on space, timing, energy and testability
- Main duties embody writing timing constraints, synthesis, formal verification, CLP, Primetime, PTPX, CECO
- Optimize datapath design for low-area, low-power and high-speed utilizing superior options in synthesis equivalent to MCMM, SAIF, multibit mapping and many others.
- Optimize PPA utilizing the fitting instrument choices and stdcell libraries / recollections
- Deal with advanced digital blocks with >1M gates in superior course of nodes from 4nm / 5nm / 7nm / 8nm
Minimal {Qualifications}
Bachelor’s diploma in Laptop Science, Electrical/Electronics Engineering, Engineering, or associated discipline.